
#define ETMR_INST 3
#define ETMR_CHANNEL_INDEX0 0
#define ETMR_CHANNEL_INDEX1 1
#define ETMR_CHANNEL_INDEX2 2
eTMR_DRV_Enable(ETMR_INST);
/* The following code shows how to switch the different duty cycle */
/* channel 0 duty cycle is 50% */
eTMR_DRV_UpdatePwmChannel(ETMR_INST, ETMR_CHANNEL_INDEX2, 0x4000U, 0);
/* channel 1 duty cycle is 75% */
eTMR_DRV_SetLdok(ETMR_INST);
OSIF_TimeDelay(10);
/* channel 0 & 1 duty cycle is 100%, here is the workaround for 100% duty cycle */
g_etmrBase[ETMR_INST]->CH[ETMR_CHANNEL_INDEX2].VAL0 = 0;
g_etmrBase[ETMR_INST]->CH[ETMR_CHANNEL_INDEX2].VAL1 = g_etmrBase[ETMR_INST]->MOD + 1;
eTMR_DRV_SetLdok(ETMR_INST);
OSIF_TimeDelay(10);
/* channel 0 duty cycle is 0 */
eTMR_DRV_UpdatePwmChannel(ETMR_INST, ETMR_CHANNEL_INDEX2, 0, 0);
eTMR_DRV_SetLdok(ETMR_INST);
OSIF_TimeDelay(10);
/* channel 0 duty cycle is 0x6000 */
eTMR_DRV_UpdatePwmChannel(ETMR_INST, ETMR_CHANNEL_INDEX2, 0x6000U, 0);
eTMR_DRV_SetLdok(ETMR_INST);