<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[调用Ram Flashdrv 进入hardfault]]></title><description><![CDATA[<p dir="auto">发现如果不SuspendAllInterrupts ，调用FLASH_DRV_EraseSector会进入hardfault.<br />
SCB信息如下：<br />
Expression	Value	Location	Type	<br />
mySCB	0xE000'ED00	0x1fff'2278	SCB_Type *	<br />
CPUID	1'091'555'860	0xe000'ed00	uint32 volatile const	<br />
ICSR	3	0xe000'ed04	uint32 volatile	<br />
VTOR	536'805'376	0xe000'ed08	uint32 volatile	<br />
AIRCR	4'194'639'872	0xe000'ed0c	uint32 volatile	<br />
SCR	0	0xe000'ed10	uint32 volatile	<br />
CCR	513	0xe000'ed14	uint32 volatile	<br />
SHPR	&lt;array&gt;""	0xe000'ed18	uint8 (volatile)[12]	<br />
SHCSR	65'540	0xe000'ed24	uint32 volatile	<br />
CFSR	65'536	0xe000'ed28	uint32 volatile	<br />
HFSR	0x4000'0000	0xe000'ed2c	uint32 volatile	<br />
DFSR	2	0xe000'ed30	uint32 volatile	<br />
MMFAR	0x2000'ff1c	0xe000'ed34	uint32 volatile	<br />
BFAR	536'936'220	0xe000'ed38	uint32 volatile	<br />
AFSR	0	0xe000'ed3c	uint32 volatile	<br />
ID_PFR	&lt;array&gt;	0xe000'ed40	uint32 (volatile const)[2]	<br />
ID_DFR	2'097'152	0xe000'ed48	uint32 volatile const	<br />
ID_AFR	0	0xe000'ed4c	uint32 volatile const	<br />
ID_MMFR	&lt;array&gt;	0xe000'ed50	uint32 (volatile const)[4]	<br />
ID_ISAR	&lt;array&gt;	0xe000'ed60	uint32 (volatile const)[6]	<br />
CLIDR	0	0xe000'ed78	uint32 volatile const	<br />
CTR	2'147'532'800	0xe000'ed7c	uint32 volatile const	<br />
CCSIDR	0	0xe000'ed80	uint32 volatile const	<br />
CSSELR	0	0xe000'ed84	uint32 volatile	<br />
CPACR	15'728'640	0xe000'ed88	uint32 volatile	<br />
NSACR	0	0xe000'ed8c	uint32 volatile	<br />
RESERVED7	&lt;array&gt;	0xe000'ed90	uint32[21]	<br />
SFSR	0	0xe000'ede4	uint32 volatile	<br />
SFAR	0	0xe000'ede8	uint32 volatile	<br />
RESERVED3	&lt;array&gt;	0xe000'edec	uint32[69]	<br />
STIR	0	0xe000'ef00	uint32 volatile	<br />
RESERVED4	&lt;array&gt;	0xe000'ef04	uint32[15]	<br />
MVFR0	269'549'601	0xe000'ef40	uint32 volatile const	<br />
MVFR1	285'212'689	0xe000'ef44	uint32 volatile const	<br />
MVFR2	64	0xe000'ef48	uint32 volatile const	<br />
RESERVED5	&lt;array&gt;	0xe000'ef4c	uint32[1]	<br />
ICIALLU	0	0xe000'ef50	uint32 volatile	<br />
RESERVED6	&lt;array&gt;	0xe000'ef54	uint32[1]	<br />
ICIMVAU	0	0xe000'ef58	uint32 volatile	<br />
DCIMVAC	0	0xe000'ef5c	uint32 volatile	<br />
DCISW	0	0xe000'ef60	uint32 volatile	<br />
DCCMVAU	0	0xe000'ef64	uint32 volatile	<br />
DCCMVAC	0	0xe000'ef68	uint32 volatile	<br />
DCCSW	0	0xe000'ef6c	uint32 volatile	<br />
DCCIMVAC	0	0xe000'ef70	uint32 volatile	<br />
DCCISW	0	0xe000'ef74	uint32 volatile	<br />
BPIALL	0	0xe000'ef78	uint32 volatile</p>
]]></description><link>https://forum.ytmicro.com/topic/1977/调用ram-flashdrv-进入hardfault</link><generator>RSS for Node</generator><lastBuildDate>Wed, 27 May 2026 19:09:48 GMT</lastBuildDate><atom:link href="https://forum.ytmicro.com/topic/1977.rss" rel="self" type="application/rss+xml"/><pubDate>Wed, 27 May 2026 06:53:42 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to 调用Ram Flashdrv 进入hardfault on Wed, 27 May 2026 07:19:01 GMT]]></title><description><![CDATA[<p dir="auto">通过您提供的 SCB 寄存器信息分析可知：</p>
<ol>
<li>HFSR=0x4000_0000 → FORCED 位有效，说明是低优先级 Fault 升级来的 HardFault。</li>
<li>CFSR=0x0001_0000 → Bus Fault 的 PRECISERR 位置 1，即精确的数据总线访问错误。</li>
<li>BFAR=0x2000_FF1C → 故障地址在 SRAM 顶部栈区附近。</li>
</ol>
<p dir="auto">完整的故障路径是：</p>
<pre><code>Flash Erase 执行中
  → 此时来了一个中断
  → CPU 响应中断，自动压栈（写 SRAM）
  → SP 落到 0x2000_FF1C 附近
  → Flash Erase 期间 AHB Bus 可能暂停/限制 SRAM 并发写
  → 栈写操作失败 → PRECISERR → HardFault
</code></pre>
<p dir="auto">结论：Flash Erase 期间发生中断，中断响应的压栈操作在 Flash 操作占用的 AHB Bus 上失败了。</p>
<p dir="auto">建议：Flash Erase/Program 前必须调用 SuspendAllInterrupts() 关全局中断，这是标准做法，不是规避 bug 的 workaround。</p>
]]></description><link>https://forum.ytmicro.com/post/8561</link><guid isPermaLink="true">https://forum.ytmicro.com/post/8561</guid><dc:creator><![CDATA[Kirk]]></dc:creator><pubDate>Wed, 27 May 2026 07:19:01 GMT</pubDate></item></channel></rss>